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\title{Software-Defined Hardware:\\ Digital Design in the 21st Century with Chisel}

\author{Martin Schoeberl\\
\texttt{masca@dtu.dk}}


\maketitle \thispagestyle{empty}

This is a proposal for a tutorial at DATE 2022 on \href{https://chisel.eecs.berkeley.edu/}{Chisel}.
It will include hands-on lab exercises.


\paragraph{Title:} Software-Defined Hardware: Digital Design in the 21st Century with Chisel
\paragraph{Organizer(s):} Martin Schoeberl, Technical University of Denmark, masca@dtu.dk
\paragraph{Reference person:} Martin Schoeberl, Technical University of Denmark, masca@dtu.dk
\paragraph{Speaker(s):} Martin Schoeberl, Technical University of Denmark, masca@dtu.dk
\paragraph{Preferred slot:} PM
\paragraph{DATE Track / Topic reference:} Track D: Design Methods and Tools

\paragraph{Motivation:}

To develop future more complex digital circuits in less time we need a better hardware description
language than VHDL or Verilog. Chisel is a hardware construction language intended to
speed up the development of digital hardware and hardware generators.

\paragraph{Intended audience:}

Hardware designers with a background on VHDL or Verilog, but also software developers
interested to learn hardware design with an object-oriented language.
 
\paragraph{Objectives:}

Learn to describe circuits in Chisel, write test benches to test them, and how to write
circuit generators.

\paragraph{Abstract:}

Chisel is a hardware construction language implemented as a domain specific language in Scala. Therefore, the full power of a modern programming language is available to describe hardware and, more important, hardware generators. Chisel has been developed at UC Berkeley and successfully used for several tape outs of RISC-V. Google has developed a tensor processing unit for edge devices in Chisel. Here at the Technical University of Denmark we use Chisel in the T-CREST project and in teaching digital electronics and advanced computer architecture.

In this tutorial I will give an overview of Chisel to describe circuits at the RTL level, how to use the Chisel tester functionality to test and simulate digital circuits, present how to synthesize circuits for an FPGA, and present advanced functionality of Chisel for the description of circuit generators.

The aim of the course is to get a basic understanding of a modern hardware description language and be able to describe simple circuits in Chisel. This course will give a basis to explore more advanced concepts of circuit generators written in Chisel/Scala. The intended audience is hardware designers with some background in VHDL or Verilog, but Chisel is also a good entry language for software programmers entering into hardware design
(e.g., porting software algorithms to FPGAs for speedup).

Besides lecturing we will have lab sessions to describe small circuits and test them in the Chisel simulation.
%and run them in an FPGA.
 \paragraph{Necessary background:}

Knowledge of a hardware description language like VHDL of Verilog is beneficial, but Chisel is also
approachable by software engineers with knowledge of an object-oriented language such as Java or C\#.

 \paragraph{References:}

\begin{itemize}
\item Jack Koenig, koenig@sifive.com, developer at SiFive
\item Jonathan Bachrach, jackbackrack@gmail.com, Initial designer of Chisel (UC Berkeley)
\item Scott Beamer, sbeamer@ucsc.edu, Assistant Professor, Computer Science and Engineering, University of California, Santa Cruz
\end{itemize}

\paragraph{Has the same tutorial (or a similar one) been presented to other events (if yes, list when/where)?}

I have given this tutorial (or a variation of it) several times:
in a two day format at University of Augsburg (about 10 attendees), several years
in a course in advanced computer architecture at DTU (about 10 attendees),
at DTU with industrial attendees (two half days),
at the Danish engineering society (very short form, afternoon),
at FPL 2018 one day tutorial (22 attendees), at FPL 2019 one day tutorial,
at ESWEEK 2019 one day tutorial, at FPL 2020 one day on-line tutorial (34 attendees),
at ESWEEK 2020 on-line tutorial (51 attendees),
at DATE 2021 on-line tutorial,
at FPL 2021 on-line (46 attendees),
and at IDA Copenhagen half day (17 attendees).

\paragraph{Has the same organizer proposed other tutorials (if yes, list when/where and on what topic)?}

No.

 \paragraph{Hands on session:} The hands on session will enable the participants to get the design
 flow and testing in Chisel going with small example designs.
 Prerequisites: Java JDK (8 or 11) and the Scala build tool (sbt) installed on the participants laptop.
 IntelliJ as IDE is optional. Installation instructions can be found
at: \url{https://github.com/schoeberl/chisel-lab/blob/master/Setup.md} (Vivado is not needed).
I also provide a Ubuntu VM with all tools installed.

 \paragraph{Tutorial material:}
The book ``Digital Design with Chisel'' accompanies the tutorial.
It is available in open access.\footnote{\url{http://www.imm.dtu.dk/~masca/chisel-book.html}, source at \url{https://github.com/schoeberl/chisel-book}}
Further material: slides as PDF and the Chisel lab on GitHub at: \url{https://github.com/schoeberl/chisel-lab}



\paragraph{Tutorial plan:}

\begin{itemize}
\item 30' Chisel introduction
\item 30' Handson lab session
\item 30' Hardware generators in Chisel/Scala
\end{itemize}

\subsection*{Further Information}

\paragraph{List of organizers and speakers:}
Prof.~Martin Schoeberl, Technical University of Denmark.

Martin Schoeberl received his PhD from the Vienna University of Technology in 2005. From 2005 to 2010 he has been Assistant Professor at the Institute of Computer Engineering. He is now Professor at the Technical University of Denmark. His research interest is on hard real-time systems, time-predictable computer architecture, and real-time Java.  Martin Schoeberl has been involved in a number of national and international research projects: JEOPARD, CJ4ES, T-CREST, RTEMP, the TACLe COST action, and PREDICT.  He has been the technical lead of the EC funded project T-CREST.  He has more than 100 publications in peer reviewed journals, conferences, and books.

Martin has been four times at UC Berkeley on three months research stays, where he has picked up Chisel
and is in close contact with the developers of Chisel.
He lead the research project T-CREST where most of the components have been written in Chisel.

\paragraph{Topics:} Hardware design in a modern hardware construction language, object oriented and
functional description of hardware and circuit generators.

\paragraph{Format:}
The tutorial will be a mix of lectures and hands-on labs. Participants shall have a laptop and I will provide
instructions for software installation beforehand. Furthermore, at the tutorial I will provide USB sticks
with a virtual machine where all software is installed and a few FPGA boards for a hands-on real
hardware experience.


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